transistor performance

英 [trænˈzɪstə(r) pəˈfɔːməns] 美 [trænˈzɪstər pərˈfɔːrməns]

晶体管性能

计算机



双语例句

  1. SOI technology is used to reduce the device capacitance and increase transistor performance.
    SOI技术用于减少器件电容和提高晶体管性能。
  2. AMD's approach was to limit power consumption even more for a given level of transistor performance.
    所以AMD的目的是在给定晶体管性能情况下降低器件的功耗。
  3. It keeps the voltage drop across the pass transistor more nearly constant, improving its performance.
    他使调整三极管上的电压降接近稳定,改进了他的性能。
  4. The class stresses insight and intuition, applied to the design of transistor circuits and the estimation of their performance.
    在做晶体管电路设计和对它们进行性能评估时,本课程强调洞察力和直觉。
  5. Effects of Stress on Bipolar Transistor Performance Parameters
    应力对双极型晶体管参数性能的影响
  6. In the system, the operating point of the circuit and the small signal parameters of MOS transistor are calculated more accurately, and the circuit performance equations are generated from its topology automatically in order to improve the equation-based method.
    通过较准确地计算电路的直流工作点和MOS管的小信号参数,以及由电路拓扑结构自动生成电路性能公式对已有的基于公式的方法进行了改进;
  7. RCA Microwave Power Bipolar Transistor with Excellent Performance
    性能优良的RCA微波功率晶体管
  8. This technology has been applied to the double layer polysilicon bipolar transistor process and excellent transistor performance has been obtained.
    已将这种工艺技术应用于双层多晶硅双极晶体管的制作工艺中,器件具有良好的电学特性。
  9. Firstly, the Bi-CMOS bipolar transistor layout structure is analysed and the operation principle is studied. Thus, the design method for making a high performance Bi-CMOS bipolar transistor is given with standard CMOS process.
    首先通过对Bi-CMOS双极型晶体管版图结构的分析,探讨了工作机理,阐明了采用标准CMOS工艺制作高性能Bi-CMOS双极型晶体管的设计方法。
  10. Two types of C-element are designed and implemented in this standard cell design flow. The transistor sizes of these C-elements are optimized for performance.
    本文提出了一种异步标准单元的设计流程,设计实现了两种兼容已有标准单元库标准的异步集成电路C单元,并对其进行了性能优化。
  11. In the new structure, the constant current source charging and discharging technology and combination transistor technology are used so as to improve the performance.
    在此振荡器结构中,采用了恒流源充放电技术和组合晶体管技术,提高了性能。
  12. The paper introduces a practical driving circuit of transistor converted power source, analyzes the principle and performance of the circuit, and puts forward the method to select the main parameters of the circuit.
    介绍了一种实用的晶体管逆变电源的驱动电路,分析了它的工作原理和特点,提出了主要参数的选择方法。
  13. A proportional drive circuit for bipolar power transistor ( GTR) is introduced, which has excellent drive performance of being able to reduce the switch losses and the storing time of the power switch.
    介绍了一种应用于双极型功率晶体管(GTR)的比例驱动电路。
  14. A two dimensional numerical simulation for NMOSFET with lateral parasitic transistor is presented. The influences of three key parameters such as the doping level, gate bias during irradiation, the bird's beak shape on NMOSFET are studied for total dose radiation hardening performance.
    对具有侧向寄生晶体管的NMOSFET进行二维数值模拟,探讨了掺杂浓度、辐照偏压以及鸟嘴形状3个关键参数对于器件抗总剂量辐射加固性能的影响。
  15. IGBT ( Insulate Gate Bipolar Transistor) enhances the performance index and the energy saving for the entire machine system.
    绝缘栅双极晶体管(InsulateGateBipolarTransistor,IGBT)作为新型电力电子器件是整机系统提高性能指标和节能指标的首选产品。
  16. The contrast experiment between the captor discharge ignition system and the original transistor ignition system is done at idle speed status, it indicates from the experiment results that it is valid to improve the engine performance especially in improving the exhaust emission level at the idle speed status.
    对设计的电容放电点火系统与原点火系统进行了对比试验,试验表明:电容放电式点火系统能有效地改善发动机的性能。
  17. The electron-sheet-density in the quantum well of Strain-Si modulation-doped NMOSFET ( Metal-Oxide-Silicon Field Effect Transistor) affects switch performance.
    应变Si(StrainSi)调制掺杂NMOSFET量子阱沟道中电子面密度直接影响器件的开关特性。
  18. Comparison of Vacuum and Semiconductor Field Effect Transistor Performance Limits
    真空和半导体场效应晶体管性能极限的比较
  19. The Integrator Realized with Single Electron Transistor And Analyzing for Its Performance
    采用单电子晶体管实现的积分器及其性能分析
  20. Based on the possess technics, using the Hspice ( Level 49) transistor models which offered by the UMC company, simulated the performance of the circuits in great detail.
    据具体工艺,应用UMC公司所提供的Hspice(Level49)晶体管模型对所设计电路进行了比较全面和详细的仿真。
  21. In addition, the effect of back uniformity of the chip on transistor performance is studied.
    文中还研究了金属化层制备中芯片背面状况对晶体管性能的影响。
  22. Through the ingenious cooperation of BIMOS OP amplifier and VMOS FET ( filed effect transistor), making the instrument have higher precision and better performance.
    由BIMOS型运放和VMOS场效应晶体管的巧妙配合,使仪器具有很高的精度和很好的性能。
  23. The design of high-voltage transistor directly determines the performance of chips.
    高压晶体管设计的好坏将直接影响芯片性能的优劣。
  24. The parasitic capacitor of transistor, matching network, biasing circuit and duty cycle are the key factors to the performance of PA. Based on the analysis above, this paper has done a great deal of research and discussion of the E-type PA in detail.
    影响其性能的关键因素主要有晶体管寄生电容、匹配网络、偏置电路、开关占空比等。本论文就上述课题对E类功率放大器进行详细的研究和讨论。